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| MC74AC190 Up/Down Counter with Preset and Ripple Clock The MC74AC190 is a reversible BCD (8421) decade counter which features synchronous counting and asynchronous presetting. The preset feature allows the MC74AC190 to be used in programmable dividers. The Count Enable input, the Terminal Count output and the Ripple Clock output make possible a variety of methods of implementing multistage counters. In the counting modes, state changes are initiated by the rising edge of the clock. * * * * * High-Speed -- 120 MHz Typical Count Frequency Synchronous Counting Asynchronous Parallel Load Cascadable Outputs Source/Sink 24 mA VCC 16 P0 15 CP 14 RC 13 TC 12 PL 11 P2 10 P3 9 UP/DOWN COUNTER WITH PRESET AND RIPPLE CLOCK N SUFFIX CASE 648-08 PLASTIC D SUFFIX CASE 751B-05 PLASTIC 1 P1 2 Q1 3 Q0 4 CE 5 U/D 6 Q2 7 Q3 8 GND LOGIC SYMBOL PIN NAMES CE CP P0-P3 PL U/D Q0-Q3 RC TC Count Enable Input Clock Pulse Input Parallel Data Inputs Asynchronous Parallel Load Input Up/Down Count Control Input Flip-Flop Outputs Ripple Clock Output Terminal Count Output PL P0 P1 P2 P3 U/D RC CE TC CP Q0 Q1 Q2 Q3 FACT DATA 5-1 MC74AC190 FUNCTIONAL DESCRIPTION The MC74AC190 is a synchronous up/down BCD decade counter. It contains four edge-triggered flip-flops with internal gating and steering logic to provide individual preset, count-up and count-down operations. Each circuit has an asynchronous parallel load capability permitting the counter to be preset to any desired number. When the Parallel Load (PL) input is LOW, information present on the Parallel Load inputs (P0-P3) is loaded into the counter and appears on the Q outputs. This operation overrides the counting functions, as indicated in the Mode Select Table. A HIGH signal on the CE input inhibits counting. When CE is LOW, internal state changes are initiated synchronously by the LOW-to-HIGH transition of the clock input. The direction of counting is determined by the U/D input signal, as indicated in the Mode Select Table. CE and U/D can be changed with the clock in either state, provided only that the recommended setup and hold times are observed. Two types of outputs are provided as overflow/underflow indicators. The terminal count (TC) output is normally LOW. It goes HIGH when the circuits reach zero in the count down mode or 9 in the count up mode. The TC output will then remain HIGH until a state change occurs, whether by counting or presetting or until U/D is changed. The TC output should not be used as a clock signal because it is subject to decoding spikes. The TC signal is also used internally to enable the Ripple Clock (RC) output. The RC output is normally HIGH. When CE is LOW and TC is HIGH, RC output will go LOW when the clock next goes LOW and will stay LOW until the clock goes HIGH again. This feature simplifies the design of multistage counters, as indicated in Figures a and b. In Figure a, each RC output is used as the clock input for the next higher stage. This configuration is particularly advantageous when the clock source has a limited drive capability, since it drives only the first stage. To prevent counting in all stages it is only necessary to inhibit the first stage, since a HIGH signal on CE inhibits the RC output pulse, as indicated in the RC Truth Table. A disadvantage of this configuration, in some applications, is the timing skew between state changes in the first and lost stages. This represents the cumulative delay of the clock as it ripples through the preceding stages. A method of causing state changes to occur simultaneously in all stages is shown in Figure b. All clock inputs are driven in parallel and the RC outputs propagate the carry/borrow signals in ripple fashion. In this configuration the LOW state duration of the clock must be long enough to allow the negative-going edge of the carry/borrow signal to ripple through to the last stage before the clock goes HIGH. There is no such restriction on the HIGH state duration of the clock, since the RC output of any device goes HIGH shortly after its CP input goes HIGH. The configuration shown in Figure c avoids ripple delays and their associated restrictions. The CE input for a given stage is formed by combining the TC signals from all the preceding stages. Note that in order to inhibit counting an enable signal must be included in each carry gate. The simple inhibit scheme of Figures a and b doesn't apply, because the TC output of a given stage is not affected by its own CE. MODE SELECT TABLE Inputs Mode PL H H L H CE L L X H U/D L H X X CP Count Up Count Down Preset (Asyn.) No Change (Hold) X X RC TRUTH TABLE Inputs PL H H H L CE L H X X TC* H X L X X X X H H H CP Output RC *TC is generated internally H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition STATE DIAGRAM 0 1 2 3 4 15 5 14 6 13 7 12 11 10 9 8 COUNT UP COUNT DOWN FACT DATA 5-2 MC74AC190 DIRECTION CONTROL ENABLE CLOCK U/D RC CE CP U/D RC CE CP U/D RC CE CP Figure a: N-Stage Counter Using Ripple Clock DIRECTION CONTROL U/D RC CE CP U/D RC CE CP U/D RC CE CP ENABLE CLOCK Figure b: Synchronous N-Stage Counter Using Ripple Carry/Borrow DIRECTION CONTROL ENABLE U/D CE CP TC CLOCK U/D CE CP TC U/D CE CP TC Figure c: Synchronous N-Stage Counter With Parallel Gated Carry/Borrow FACT DATA 5-3 MC74AC190 LOGIC DIAGRAM CP U/D P0 CE P1 P2 P3 PL J CLOCK K PRESET CLEAR Q Q J CLOCK K PRESET CLEAR Q Q J CLOCK K PRESET CLEAR Q Q J CLOCK K PRESET CLEAR Q Q RC TC Q0 Q1 Q2 Q3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. MAXIMUM RATINGS* Symbol VCC Vin Vout Iin Iout ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. FACT DATA 5-4 MC74AC190 RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current -- High Output Current -- Low -40 25 VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 150 40 25 10 ns/V 8.0 140 85 -24 24 C C mA mA ns/V Typ 5.0 5.0 Max 6.0 5.5 VCC V Unit V 1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. DC CHARACTERISTICS 74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level Input Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 8.0 0.002 0.001 0.001 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 74AC TA = -40C to +85C Unit Conditions Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 75 -75 80 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A V *VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 A V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND VIL Maximum Low Level Input Voltage Minimum High Level Output Voltage V VOH V V A mA mA A * All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. FACT DATA 5-5 MC74AC190 AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3) 74AC190 Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Maximum Count Frequency Propagation Delay CP to Qn Propagation Delay CP to Qn Propagation Delay CP to TC Propagation Delay CP to TC Propagation Delay CP to RC Propagation Delay CP to RC Propagation Delay CE to RC Propagation Delay CE to RC Propagation Delay U/D to RC Propagation Delay U/D to RC Propagation Delay U/D to TC Propagation Delay U/D to TC Propagation Delay Pn to Qn Propagation Delay Pn to Qn Propagation Delay PL to Qn Propagation Delay PL to Qn 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.5 3.3 5.0 3.3 5.0 3.3 5.0 80 110 2.0 1.5 2.5 1.5 3.5 2.5 3.5 2.5 2.5 2.0 2.5 1.5 2.5 1.5 2.0 1.5 2.5 1.5 2.5 2.5 3.0 3.0 3.0 3.0 2.0 2.0 2.0 2.0 3.0 3.0 2.5 2.0 1.4 9.5 14.5 10.0 17.0 11.5 17.0 12.5 11.5 7.5 11.0 8.0 12.0 8.0 13.0 8.0 14.0 8.5 13.0 8.5 12.0 8.0 12.0 8.0 15.0 10.0 14.0 9.5 18.0 10.5 15.0 10.5 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 1.5 1.5 1.5 1.5 2.0 2.0 2.0 2.0 15.5 11.0 16.0 11.5 18.5 13.0 18.5 13.0 13.0 9.5 12.5 9.5 13.0 9.0 14.5 9.0 15.5 10.0 14.5 10.0 13.0 9.0 13.0 9.0 17.0 11.5 16.0 11.0 19.5 12.5 17.0 12.0 TA = +25C CL = 50 pF Typ Max 74AC190 TA = -40C to +85C CL = 50 pF Min Max MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 3-3 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 Unit Fig. No. * Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V. FACT DATA 5-6 MC74AC190 AC OPERATING REQUIREMENTS 74AC190 Symbol Parameter VCC* (V) Typ ts th ts th ts th tw tw trec Setup Time, HIGH or LOW Pn to PL Hold Time, HIGH or LOW Pn to PL Setup Time, LOW CE to CP Hold Time, LOW CE to CP Setup Time, HIGH or LOW U/D to CP Hold Time HIGH or LOW U/D to CP PL Pulse Width, LOW CP Pulse Width, LOW Recovery Time PL to CP 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 TA = +25C CL = 50 pF 74AC190 TA = -40C to +85C CL = 50 pF Unit Fig. No. Guaranteed Minimum 0.5 0 0 0 6.5 4.5 0 0 8.5 5.0 0 0 5.0 3.5 5.0 3.5 0.5 0 0.5 0 0 0 7.5 5.0 0 0 9.5 6.0 0 0 5.5 4.0 5.5 4.0 0.5 0 ns ns ns ns ns ns ns ns ns 3-9 3-9 3-9 3-9 3-9 3-9 3-6 3-6 3-9 * Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V. CAPACITANCE Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 75 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V FACT DATA 5-7 MC74AC190 OUTLINE DIMENSIONS N SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R 9 -A- 16 B 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 F S C L -T- H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M -A- D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J 9 16 -B- 1 8 P 8 PL 0.25 (0.010) M B S G F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 K C -T- SEATING PLANE R X 45 _ M D 16 PL M J 0.25 (0.010) TB S A S DIM A B C D F G J K M P R Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 FACT DATA 5-8 *MC74AC190/D* MC74AC190/D |
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